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00012 #ifndef RAIL_MAP_H
00013 #define RAIL_MAP_H
00014
00015 #include "rail_type.h"
00016 #include "depot_type.h"
00017 #include "signal_func.h"
00018 #include "track_func.h"
00019 #include "tile_map.h"
00020 #include "signal_type.h"
00021
00022
00024 enum RailTileType {
00025 RAIL_TILE_NORMAL = 0,
00026 RAIL_TILE_SIGNALS = 1,
00027 RAIL_TILE_DEPOT = 3,
00028 };
00029
00037 static inline RailTileType GetRailTileType(TileIndex t)
00038 {
00039 assert(IsTileType(t, MP_RAILWAY));
00040 return (RailTileType)GB(_m[t].m5, 6, 2);
00041 }
00042
00050 static inline bool IsPlainRail(TileIndex t)
00051 {
00052 RailTileType rtt = GetRailTileType(t);
00053 return rtt == RAIL_TILE_NORMAL || rtt == RAIL_TILE_SIGNALS;
00054 }
00055
00061 static inline bool IsPlainRailTile(TileIndex t)
00062 {
00063 return IsTileType(t, MP_RAILWAY) && IsPlainRail(t);
00064 }
00065
00066
00073 static inline bool HasSignals(TileIndex t)
00074 {
00075 return GetRailTileType(t) == RAIL_TILE_SIGNALS;
00076 }
00077
00084 static inline void SetHasSignals(TileIndex tile, bool signals)
00085 {
00086 assert(IsPlainRailTile(tile));
00087 SB(_m[tile].m5, 6, 1, signals);
00088 }
00089
00096 static inline bool IsRailDepot(TileIndex t)
00097 {
00098 return GetRailTileType(t) == RAIL_TILE_DEPOT;
00099 }
00100
00106 static inline bool IsRailDepotTile(TileIndex t)
00107 {
00108 return IsTileType(t, MP_RAILWAY) && IsRailDepot(t);
00109 }
00110
00116 static inline RailType GetRailType(TileIndex t)
00117 {
00118 return (RailType)GB(_m[t].m3, 0, 4);
00119 }
00120
00126 static inline void SetRailType(TileIndex t, RailType r)
00127 {
00128 SB(_m[t].m3, 0, 4, r);
00129 }
00130
00131
00137 static inline TrackBits GetTrackBits(TileIndex tile)
00138 {
00139 assert(IsPlainRailTile(tile));
00140 return (TrackBits)GB(_m[tile].m5, 0, 6);
00141 }
00142
00148 static inline void SetTrackBits(TileIndex t, TrackBits b)
00149 {
00150 assert(IsPlainRailTile(t));
00151 SB(_m[t].m5, 0, 6, b);
00152 }
00153
00161 static inline bool HasTrack(TileIndex tile, Track track)
00162 {
00163 return HasBit(GetTrackBits(tile), track);
00164 }
00165
00172 static inline DiagDirection GetRailDepotDirection(TileIndex t)
00173 {
00174 return (DiagDirection)GB(_m[t].m5, 0, 2);
00175 }
00176
00183 static inline Track GetRailDepotTrack(TileIndex t)
00184 {
00185 return DiagDirToDiagTrack(GetRailDepotDirection(t));
00186 }
00187
00188
00195 static inline TrackBits GetRailReservationTrackBits(TileIndex t)
00196 {
00197 assert(IsPlainRailTile(t));
00198 byte track_b = GB(_m[t].m2, 8, 3);
00199 Track track = (Track)(track_b - 1);
00200 if (track_b == 0) return TRACK_BIT_NONE;
00201 return (TrackBits)(TrackToTrackBits(track) | (HasBit(_m[t].m2, 11) ? TrackToTrackBits(TrackToOppositeTrack(track)) : 0));
00202 }
00203
00210 static inline void SetTrackReservation(TileIndex t, TrackBits b)
00211 {
00212 assert(IsPlainRailTile(t));
00213 assert(b != INVALID_TRACK_BIT);
00214 assert(!TracksOverlap(b));
00215 Track track = RemoveFirstTrack(&b);
00216 SB(_m[t].m2, 8, 3, track == INVALID_TRACK ? 0 : track+1);
00217 SB(_m[t].m2, 11, 1, (byte)(b != TRACK_BIT_NONE));
00218 }
00219
00227 static inline bool TryReserveTrack(TileIndex tile, Track t)
00228 {
00229 assert(HasTrack(tile, t));
00230 TrackBits bits = TrackToTrackBits(t);
00231 TrackBits res = GetRailReservationTrackBits(tile);
00232 if ((res & bits) != TRACK_BIT_NONE) return false;
00233 res |= bits;
00234 if (TracksOverlap(res)) return false;
00235 SetTrackReservation(tile, res);
00236 return true;
00237 }
00238
00245 static inline void UnreserveTrack(TileIndex tile, Track t)
00246 {
00247 assert(HasTrack(tile, t));
00248 TrackBits res = GetRailReservationTrackBits(tile);
00249 res &= ~TrackToTrackBits(t);
00250 SetTrackReservation(tile, res);
00251 }
00252
00259 static inline bool HasDepotReservation(TileIndex t)
00260 {
00261 assert(IsRailDepot(t));
00262 return HasBit(_m[t].m5, 4);
00263 }
00264
00271 static inline void SetDepotReservation(TileIndex t, bool b)
00272 {
00273 assert(IsRailDepot(t));
00274 SB(_m[t].m5, 4, 1, (byte)b);
00275 }
00276
00283 static inline TrackBits GetDepotReservationTrackBits(TileIndex t)
00284 {
00285 return HasDepotReservation(t) ? TrackToTrackBits(GetRailDepotTrack(t)) : TRACK_BIT_NONE;
00286 }
00287
00288
00289 static inline bool IsPbsSignal(SignalType s)
00290 {
00291 return s == SIGTYPE_PBS || s == SIGTYPE_PBS_ONEWAY;
00292 }
00293
00294 static inline SignalType GetSignalType(TileIndex t, Track track)
00295 {
00296 assert(GetRailTileType(t) == RAIL_TILE_SIGNALS);
00297 byte pos = (track == TRACK_LOWER || track == TRACK_RIGHT) ? 4 : 0;
00298 return (SignalType)GB(_m[t].m2, pos, 3);
00299 }
00300
00301 static inline void SetSignalType(TileIndex t, Track track, SignalType s)
00302 {
00303 assert(GetRailTileType(t) == RAIL_TILE_SIGNALS);
00304 byte pos = (track == TRACK_LOWER || track == TRACK_RIGHT) ? 4 : 0;
00305 SB(_m[t].m2, pos, 3, s);
00306 if (track == INVALID_TRACK) SB(_m[t].m2, 4, 3, s);
00307 }
00308
00309 static inline bool IsPresignalEntry(TileIndex t, Track track)
00310 {
00311 return GetSignalType(t, track) == SIGTYPE_ENTRY || GetSignalType(t, track) == SIGTYPE_COMBO;
00312 }
00313
00314 static inline bool IsPresignalExit(TileIndex t, Track track)
00315 {
00316 return GetSignalType(t, track) == SIGTYPE_EXIT || GetSignalType(t, track) == SIGTYPE_COMBO;
00317 }
00318
00320 static inline bool IsOnewaySignal(TileIndex t, Track track)
00321 {
00322 return GetSignalType(t, track) != SIGTYPE_PBS;
00323 }
00324
00325 static inline void CycleSignalSide(TileIndex t, Track track)
00326 {
00327 byte sig;
00328 byte pos = (track == TRACK_LOWER || track == TRACK_RIGHT) ? 4 : 6;
00329
00330 sig = GB(_m[t].m3, pos, 2);
00331 if (--sig == 0) sig = IsPbsSignal(GetSignalType(t, track)) ? 2 : 3;
00332 SB(_m[t].m3, pos, 2, sig);
00333 }
00334
00335 static inline SignalVariant GetSignalVariant(TileIndex t, Track track)
00336 {
00337 byte pos = (track == TRACK_LOWER || track == TRACK_RIGHT) ? 7 : 3;
00338 return (SignalVariant)GB(_m[t].m2, pos, 1);
00339 }
00340
00341 static inline void SetSignalVariant(TileIndex t, Track track, SignalVariant v)
00342 {
00343 byte pos = (track == TRACK_LOWER || track == TRACK_RIGHT) ? 7 : 3;
00344 SB(_m[t].m2, pos, 1, v);
00345 if (track == INVALID_TRACK) SB(_m[t].m2, 7, 1, v);
00346 }
00347
00352 enum SignalState {
00353 SIGNAL_STATE_RED = 0,
00354 SIGNAL_STATE_GREEN = 1,
00355 };
00356
00362 static inline void SetSignalStates(TileIndex tile, uint state)
00363 {
00364 SB(_m[tile].m4, 4, 4, state);
00365 }
00366
00372 static inline uint GetSignalStates(TileIndex tile)
00373 {
00374 return GB(_m[tile].m4, 4, 4);
00375 }
00376
00383 static inline SignalState GetSingleSignalState(TileIndex t, byte signalbit)
00384 {
00385 return (SignalState)HasBit(GetSignalStates(t), signalbit);
00386 }
00387
00393 static inline void SetPresentSignals(TileIndex tile, uint signals)
00394 {
00395 SB(_m[tile].m3, 4, 4, signals);
00396 }
00397
00403 static inline uint GetPresentSignals(TileIndex tile)
00404 {
00405 return GB(_m[tile].m3, 4, 4);
00406 }
00407
00414 static inline bool IsSignalPresent(TileIndex t, byte signalbit)
00415 {
00416 return HasBit(GetPresentSignals(t), signalbit);
00417 }
00418
00423 static inline bool HasSignalOnTrack(TileIndex tile, Track track)
00424 {
00425 assert(IsValidTrack(track));
00426 return
00427 GetRailTileType(tile) == RAIL_TILE_SIGNALS &&
00428 (GetPresentSignals(tile) & SignalOnTrack(track)) != 0;
00429 }
00430
00438 static inline bool HasSignalOnTrackdir(TileIndex tile, Trackdir trackdir)
00439 {
00440 assert (IsValidTrackdir(trackdir));
00441 return
00442 GetRailTileType(tile) == RAIL_TILE_SIGNALS &&
00443 GetPresentSignals(tile) & SignalAlongTrackdir(trackdir);
00444 }
00445
00452 static inline SignalState GetSignalStateByTrackdir(TileIndex tile, Trackdir trackdir)
00453 {
00454 assert(IsValidTrackdir(trackdir));
00455 assert(HasSignalOnTrack(tile, TrackdirToTrack(trackdir)));
00456 return GetSignalStates(tile) & SignalAlongTrackdir(trackdir) ?
00457 SIGNAL_STATE_GREEN : SIGNAL_STATE_RED;
00458 }
00459
00463 static inline void SetSignalStateByTrackdir(TileIndex tile, Trackdir trackdir, SignalState state)
00464 {
00465 if (state == SIGNAL_STATE_GREEN) {
00466 SetSignalStates(tile, GetSignalStates(tile) | SignalAlongTrackdir(trackdir));
00467 } else {
00468 SetSignalStates(tile, GetSignalStates(tile) & ~SignalAlongTrackdir(trackdir));
00469 }
00470 }
00471
00477 static inline bool HasPbsSignalOnTrackdir(TileIndex tile, Trackdir td)
00478 {
00479 return
00480 IsTileType(tile, MP_RAILWAY) &&
00481 HasSignalOnTrackdir(tile, td) &&
00482 IsPbsSignal(GetSignalType(tile, TrackdirToTrack(td)));
00483 }
00484
00491 static inline bool HasOnewaySignalBlockingTrackdir(TileIndex tile, Trackdir td)
00492 {
00493 return
00494 IsTileType(tile, MP_RAILWAY) &&
00495 HasSignalOnTrackdir(tile, ReverseTrackdir(td)) &&
00496 !HasSignalOnTrackdir(tile, td) &&
00497 IsOnewaySignal(tile, TrackdirToTrack(td));
00498 }
00499
00500
00504 RailType GetTileRailType(TileIndex tile);
00505
00507 enum RailGroundType {
00508 RAIL_GROUND_BARREN = 0,
00509 RAIL_GROUND_GRASS = 1,
00510 RAIL_GROUND_FENCE_NW = 2,
00511 RAIL_GROUND_FENCE_SE = 3,
00512 RAIL_GROUND_FENCE_SENW = 4,
00513 RAIL_GROUND_FENCE_NE = 5,
00514 RAIL_GROUND_FENCE_SW = 6,
00515 RAIL_GROUND_FENCE_NESW = 7,
00516 RAIL_GROUND_FENCE_VERT1 = 8,
00517 RAIL_GROUND_FENCE_VERT2 = 9,
00518 RAIL_GROUND_FENCE_HORIZ1 = 10,
00519 RAIL_GROUND_FENCE_HORIZ2 = 11,
00520 RAIL_GROUND_ICE_DESERT = 12,
00521 RAIL_GROUND_WATER = 13,
00522 RAIL_GROUND_HALF_SNOW = 14,
00523 };
00524
00525 static inline void SetRailGroundType(TileIndex t, RailGroundType rgt)
00526 {
00527 SB(_m[t].m4, 0, 4, rgt);
00528 }
00529
00530 static inline RailGroundType GetRailGroundType(TileIndex t)
00531 {
00532 return (RailGroundType)GB(_m[t].m4, 0, 4);
00533 }
00534
00535 static inline bool IsSnowRailGround(TileIndex t)
00536 {
00537 return GetRailGroundType(t) == RAIL_GROUND_ICE_DESERT;
00538 }
00539
00540
00541 static inline void MakeRailNormal(TileIndex t, Owner o, TrackBits b, RailType r)
00542 {
00543 SetTileType(t, MP_RAILWAY);
00544 SetTileOwner(t, o);
00545 _m[t].m2 = 0;
00546 _m[t].m3 = r;
00547 _m[t].m4 = 0;
00548 _m[t].m5 = RAIL_TILE_NORMAL << 6 | b;
00549 SB(_m[t].m6, 2, 4, 0);
00550 _me[t].m7 = 0;
00551 }
00552
00553
00554 static inline void MakeRailDepot(TileIndex t, Owner o, DepotID did, DiagDirection d, RailType r)
00555 {
00556 SetTileType(t, MP_RAILWAY);
00557 SetTileOwner(t, o);
00558 _m[t].m2 = did;
00559 _m[t].m3 = r;
00560 _m[t].m4 = 0;
00561 _m[t].m5 = RAIL_TILE_DEPOT << 6 | d;
00562 SB(_m[t].m6, 2, 4, 0);
00563 _me[t].m7 = 0;
00564 }
00565
00566 #endif